The fabrication of integrated circuitry on a semiconductor substrate involves many intricate and complex processes. One such process, known as chemical-mechanical polishing (CMP), is used to mechanically and chemically planarize the devices that are formed on the semiconductor substrate. Materials deposited onto the substrate are often concentrated at particular points along the surface of the substrate, producing what are commonly referred to as peaks and valleys in the deposited materials. Chemical-mechanical polishing is typically performed at various stages of fabrication to smooth out these peaks and valleys and planarize each layer of depositions to some desired degree before the fabricated devices are eventually diced and separated one from another.
Chemical-mechanical polishing is described in U.S. Pat. No. 5,245,790 to Jerbic, the entire contents of which is expressly incorporated herein by reference. During Chemical-mechanical polishing (CMP), a polishing pad is brought into abrasive contact with a product wafer. An abrasive slurry, which is usually comprised of a ceramic material such as silicon dioxide or alumina, is applied to the pad as the pad and product wafer are moved relative to one another. The slurry acts upon the wafer to chemically etch and mechanically wear the devices. The abrasive action between the pad and wafer uniformly removes the superfluous material to create a more planar surface for the next deposition of material.
Occasionally, material that is removed from the production wafers will accumulate on the pad and reduce the pad's ability to properly erode the wafer. Great care must be taken during CMP to ensure that the devices are properly eroded, so when clogging occurs, the pad must be removed from production and reconditioned. Clogged pads are typically reconditioned, or cleaned by drawing a rough implement across the pad surface to remove the excess material and contaminants from the pad.
To minimize the potential for damage to product wafers during CMP, new and reconditioned pads are operated for a period of time with the use of a utility wafer, sometimes referred to in the art as a "dummy" wafer. Utility wafers emulate production wafers and act to stimulate, smooth and condition the pad before the pad is applied to a production wafer. The utility wafer also functions to alert process personnel of any deficiencies in pad performance. If a pad fails to erode the utility wafer with uniformity and consistency, or if the pad introduces impurities into the utility wafer, process personnel can determine that the pad is need of reconditioning or possible disposal.
Prior art utility wafers are comprised of a silicon wafer having a thin coating of a dielectric material, such as silicon dioxide, on the working surface of the wafer. The dielectric coating is relatively thin, typically about 10,000 angstroms in thickness. Due to the abrasive action between the pad and utility wafer, the silicon dioxide coating wears quickly so that the coated wafer can be used only once for a relatively short period of time. The silicon utility wafer can be re-used, but only after it has been etched and stripped of the old coating and re-deposited with a new coating of material. Maintenance of such prior art utility wafers is therefore expensive and lowers productivity by occupying equipment that would otherwise be utilized for other necessary processes, such as manufacturing production wafers.
What is needed, therefore, is a low-cost, low-maintenance utility wafer that closely emulates production wafers for the purpose of conditioning a CMP polishing pad. An object of the present invention is to provide such a wafer.